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NJU7095R-TE1
Electronics Part Number
NJU7095R-TE1-WXManufacturer
onsemi
NJU7095R-TE1
Description
Dual-channel CMOS integrated circuit in 8VSP package.Inventory
600 Pcs New Original In Stock
"Pkg: 8-DMP; Elec: two CMOS rail-to-rail circuits; Func: micro-power signal conditioning; App: battery gear.",
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Minimum 1
Minimum 1
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Technical Specifications
Category
Clock/Timing, Clock Buffers, Drivers
Manufacturer
onsemi
Packaging
-
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VFQFN Exposed Pad
Series
-
Base Product Number
NB3N108
Product Status
Obsolete
Type
Fanout Buffer (Distribution), Data
Voltage - Supply
3V ~ 3.6V
Output
HCSL, LVDS
Supplier Device Package
32-QFN (5x5)
Number of Circuits
1
Frequency - Max
400 MHz
Input
HCSL, LVCMOS, LVDS, LVPECL, LVTTL
Ratio - Input:Output
1:8
Differential - Input:Output
Yes/Yes
Data Sheet Document (D)
Datasheets
Download NB3N108KMNG Product Specification (PDF)
HTML Datasheet
NB3N108KMNG-DG
Environmental & Export Classification
RoHS Status
ROHS3 Compliant
Moisture Sensitivity Level (MSL)
1 (Unlimited)
REACH Status
REACH Unaffected
ECCN
EAR99
HTSUS
8542.39.0001
Additional Information
Other Names
ONSONSNB3N108KMNG 2156-NB3N108KMNG-OS 1990-NB3N108KMNG 2832-NB3N108KMNG NB3N108KMNG-DG NB3N108KMNGOS
Standard Package
74
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Frequently Asked Questions (FAQ)
How can I mitigate signal integrity issues when using the NB3N108KMNG in a mixed-signal PCB design w
When using the NB3N108KMNG in mixed-signal designs, ensure strict impedance control (100Ω differential for LVDS, 75Ω for HCSL) and route outputs separately to avoid crosstalk. Due to the NB3N108KMNG's high 400 MHz maximum frequency, maintain consistent trace lengths across fanout paths to minimize skew. Use ground stitching vias along high-speed outputs and avoid routing sensitive traces near switching power supplies. Terminate LVDS lines at the receiver to prevent reflections, and verify signal integrity with IBIS simulations based on actual board layout parameters specific to the NB3N108KMNG’s drive characteristics.
What design considerations are critical when replacing a failing NB3N108KMNG in an existing 400 MHz
When replacing an NB3N108KMNG, verify that the operating environment hasn’t exceeded its -40°C to 85°C range or 3V–3.6V supply window, as out-of-spec conditions may have caused premature failure. Check for unresolved signal reflections or improper terminations that could stress the device. Since the NB3N108KMNG is obsolete, ensure any replacement (e.g., its variant NB3N108KMNR4G) matches pinout, drive strength, and skew performance. Review solder joints on the 32-QFN exposed pad for thermal fatigue, and reflow per MSL1 guidelines to maintain reliability during rework.
Can the NB3N108KMNG reliably drive long traces in a backplane application at 400 MHz, and what layou
The NB3N108KMNG can drive moderate trace lengths at 400 MHz, but trace loss and skew become critical in backplane applications. Keep total trace length under 6 inches and use controlled-impedance FR4 or better (e.g., Rogers) materials. For the NB3N108KMNG’s 1:8 LVDS/HCSL outputs, route all paths with tight length matching (±5 mils) to maintain timing alignment. Avoid vias where possible, and if needed, use back-drilled or staggered vias. Simulate channel response with channel operating margin (COM) analysis to ensure adequate noise margin, especially as the NB3N108KMNG approaches its maximum rated frequency.
How does the obsolescence of the NB3N108KMNG impact long-term product reliability and supply chain p
The NB3N108KMNG being marked as obsolete means long-term reliability support and future supply are at risk. While current inventory is available (1655 pcs), future production runs will require redesign. Mitigate this by securing last-time buy quantities and vetting drop-in replacements like the NB3N108KMNR4G, which matches key specs. Evaluate alternative clock buffers from Analog Devices or Texas Instruments (e.g., LMK00338) for equivalent 1:8 LVDS/HCSL fanout at 400 MHz. Update risk assessments to reflect component end-of-life status and qualify second sources early.
What are the risks of using the NB3N108KMNG with an input clock signal from a non-terminated LVPECL
Using the NB3N108KMNG with an unterminated LVPECL input risks signal reflections and duty cycle distortion at high frequencies due to impedance mismatch. LVPECL requires proper 50Ω to Vtt (Vcc-2V) termination near the NB3N108KMNG input pin. Avoid series termination unless driving point-to-point over controlled impedance traces. Additionally, ensure the input signal voltage levels stay within the NB3N108KMNG’s specified common-mode range to prevent input stage saturation. Use AC coupling with appropriate biasing if the source and NB3N108KMNG operate at different supply voltages to maintain signal integrity.
How can I mitigate signal integrity issues when using the NB3N108KMNG in a mixed-signal PCB design w
When using the NB3N108KMNG in mixed-signal designs, ensure strict impedance control (100Ω differential for LVDS, 75Ω for HCSL) and route outputs separately to avoid crosstalk. Due to the NB3N108KMNG's high 400 MHz maximum frequency, maintain consistent trace lengths across fanout paths to minimize skew. Use ground stitching vias along high-speed outputs and avoid routing sensitive traces near switching power supplies. Terminate LVDS lines at the receiver to prevent reflections, and verify signal integrity with IBIS simulations based on actual board layout parameters specific to the NB3N108KMNG’s drive characteristics.
What design considerations are critical when replacing a failing NB3N108KMNG in an existing 400 MHz
When replacing an NB3N108KMNG, verify that the operating environment hasn’t exceeded its -40°C to 85°C range or 3V–3.6V supply window, as out-of-spec conditions may have caused premature failure. Check for unresolved signal reflections or improper terminations that could stress the device. Since the NB3N108KMNG is obsolete, ensure any replacement (e.g., its variant NB3N108KMNR4G) matches pinout, drive strength, and skew performance. Review solder joints on the 32-QFN exposed pad for thermal fatigue, and reflow per MSL1 guidelines to maintain reliability during rework.
Can the NB3N108KMNG reliably drive long traces in a backplane application at 400 MHz, and what layou
The NB3N108KMNG can drive moderate trace lengths at 400 MHz, but trace loss and skew become critical in backplane applications. Keep total trace length under 6 inches and use controlled-impedance FR4 or better (e.g., Rogers) materials. For the NB3N108KMNG’s 1:8 LVDS/HCSL outputs, route all paths with tight length matching (±5 mils) to maintain timing alignment. Avoid vias where possible, and if needed, use back-drilled or staggered vias. Simulate channel response with channel operating margin (COM) analysis to ensure adequate noise margin, especially as the NB3N108KMNG approaches its maximum rated frequency.
How does the obsolescence of the NB3N108KMNG impact long-term product reliability and supply chain p
The NB3N108KMNG being marked as obsolete means long-term reliability support and future supply are at risk. While current inventory is available (1655 pcs), future production runs will require redesign. Mitigate this by securing last-time buy quantities and vetting drop-in replacements like the NB3N108KMNR4G, which matches key specs. Evaluate alternative clock buffers from Analog Devices or Texas Instruments (e.g., LMK00338) for equivalent 1:8 LVDS/HCSL fanout at 400 MHz. Update risk assessments to reflect component end-of-life status and qualify second sources early.
What are the risks of using the NB3N108KMNG with an input clock signal from a non-terminated LVPECL
Using the NB3N108KMNG with an unterminated LVPECL input risks signal reflections and duty cycle distortion at high frequencies due to impedance mismatch. LVPECL requires proper 50Ω to Vtt (Vcc-2V) termination near the NB3N108KMNG input pin. Avoid series termination unless driving point-to-point over controlled impedance traces. Additionally, ensure the input signal voltage levels stay within the NB3N108KMNG’s specified common-mode range to prevent input stage saturation. Use AC coupling with appropriate biasing if the source and NB3N108KMNG operate at different supply voltages to maintain signal integrity.
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Sep 15 2026
